1. Field of the Invention
The present invention relates to a semiconductor device, and in particular, to a semiconductor device comprising an electrostatic discharge power clamp device.
2. Description of the Related Art
Improving semiconductor device reliability has become very important due to improved semiconductor device scaling processes and critical requirements for dimensions and functions of consumer products. Semiconductor devices, however, may suffer from electrostatic discharge (ESD) damage during the processing, fabrication, assembly, delivery, testing and application of the semiconductor devices. Thus, ESD protection technology is required for semiconductor devices to prevent against possible ESD damage and insure sales quality. More specifically, ESD protection device design is required for semiconductor devices. For a system on a chip (SoC) using advanced semiconductor fabricating processes, the SoC may fail testing because of ESD damage to small scale devices in the SoC. Should additional ESD protection circuits be implemented, chip area would increase and high device density requirement would not be achieved.
Therefore, a semiconductor device with good device reliability and high device density is needed.